I frequently get asked the question "just what is the difference between AMD and Intel processors?" Since the industry has moved away from raw processor clock speed as a measure of difference, computer users want to understand more about the underlying differences between processors that can ultimately affects their software environment.
The answer is in AMD's Direct Connect Architecture. A main function of the processor is to read and write information to and from memory as fast and efficiently as possible. When developing the AMD Opteron and AMD Athlon 64 processors, our engineers needed to find a method to efficiently deliver data to the processor from main memory even when handling the large data loads of 64-bit and multi-core computing. To keep all cores as productive as possible, they looked to processor designs outside of what had been used for 32-bit x86-based processors.
The integrated memory controller, one of the key innovations of our Direct Connect Architecture, has it roots in RISC processors. In traditional x86 system design, a frontside bus connects the CPU to the main memory of a system. A separate memory controller chip is responsible for coordinating the data traffic as it passes from the memory to the CPU. However, in AMD64 and RISC processor design, the memory controller is integrated onto the processor, which can reduce the amount of time it takes for data to move from one component to another.
The benefit of an integrated memory controller for AMD64 processors, along with the power efficiency of our processors, has resulted in AMD's current performance-per-watt leadership. The industry is beginning to understand that achieving processor performance is not just a result of increasing processor clock speeds -- memory handling is also an important variable.
We are now entering a world where virtualization with x86-based processor is being a "must have" function. Virtualization is fast becoming the underlying framework to increase system utilization, achieve workload consolidation, and aid in increasing computer security. An integrated memory controller plays a key role since virtualization is an extremely memory-intensive activity. Virtualization software, called the hypervisor, has to carve up and keep track of memory for itself and multiple guest operating environments and constantly switch memory between these environments. AMD's integrated memory controller is "virtualization-aware," allowing more efficient memory handling, and also strong partitioning and isolation, ensuring at the hardware level that virtual machines can't read or write each other's memory space. A good example of a benefit of AMD's virtualization-aware memory controller is the tagged Translation Look-aside Buffer (TLB), an architecture construct that is common in RISC processors and available in AMD's next generation processors with AMD Virtualization. A TLB contains information about the pages in memory the processor has recently accessed. With the untagged TLB found in the traditional frontside bus architecture, memory must be completely cleared (flushed) and reloaded when switching between hypervisor and guest environments. A tagged TLB enables the attaching of address space identifier (ASID) to the TLB entries. With this feature, there is no need to completely flush the TLB when the processor switches between the hypervisor and the guest environments, thereby enhancing memory operations.
As we enter into the world where virtualization becomes a core feature of processors and operating systems, good system architecture becomes even more important. AMD's Direct Connect Architecture continues to be the framework for driving innovation into x86-based processor technology.
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